Standard Cells Characterization Engineer

About the role

Join Cisco's Common Hardware Group to lead the characterization of standard‑cell libraries used in cutting‑edge ASICs. You will own the end‑to‑end flow from netlist extraction to Liberty file delivery, ensuring tight correlation with TSMC reference data.

Key responsibilities

• Lead the full characterization flow for standard‑cell libraries, covering timing, power, noise, and leakage across PVT and RC corners.
• Define and maintain PrimeLib/Liberate methodology, templates, and automation.
• Drive correlation closure against TSMC golden Liberty specifications.
• Manage extraction‑to‑characterization integration, including LVS/StarRC setup, RC corner alignment, and well‑bias handling.
• Debug failures at netlist, simulation, and Liberty‑model levels and implement root‑cause fixes.
• Develop reusable Tcl/Shell scripts, validation checks, and documentation for repeatable releases.
• Collaborate with library design, physical verification, and CAD teams on cell readiness and release criteria.
• Lead characterization reviews, define sign‑off criteria, and resolve blockers before library release.

Required profile

• Bachelor’s degree in Electrical Engineering, Computer Science or related field with 6 years experience (or Master’s with 4 years, PhD with 1 year).
• Hands‑on experience characterizing standard‑cell libraries using PrimeLib, Liberate or equivalent tools.
• Strong understanding of Liberty formats (NLDM, CCS, noise, leakage) and TSMC (or similar) characterization flows.
• Experience with parasitic extraction (StarRC or equivalent), LVS, and RC corner/PVT alignment.
• Solid knowledge of CMOS device behavior, timing arcs, power domains, and well/substrate bias in deep‑submicron nodes.

Required skills

• PrimeLib / Liberate characterization tools
• Liberty format expertise (NLDM, CCS, noise, leakage modeling)
• TSMC (or comparable) standard‑cell characterization flow
• Parasitic extraction tools such as StarRC
• LVS and RC corner alignment
• CMOS device physics, timing and power analysis
• Tcl, Perl, Python scripting for flow automation