ASIC Design Verification Engineer

About the role

Cisco is hiring an ASIC Design Verification Engineer for its Silicon One team, which builds hardware platforms central to the AI era and powers Cisco's Switching, Routing and Wireless products. The role is hybrid, with four days per week at the Yerevan office.

Key responsibilities

• Drive comprehensive test planning and develop robust test benches for ASIC projects.
• Collaborate with design, design-verification and physical design teams to integrate and validate test logic throughout implementation.
• Identify and resolve technical issues using advanced debugging tools and scripting.
• Develop and refine verification strategies to ensure optimal coverage and efficiency.
• Contribute to delivering high-quality, reliable products.

Required profile

• Bachelor's or Master's degree in Electrical or Computer Engineering or a related field.
• 3+ years of experience in design verification.
• Demonstrated experience in test planning based on complex design specifications.
• Proven expertise in testbench development using System Verilog.
• Hands-on debugging experience, preferably with DVE and Verdi tools.
• Proficiency in scripting languages, with at least one of Tcl, Python or Perl.

Preferred qualifications

• Knowledge of UVM and System Verilog.
• Experience adapting verification strategies for AI calibration and emerging technologies.
• Strong problem-solving and analytical skills, and good communication skills in cross-functional teams.