ASIC Engineer (Hybrid, Yerevan)

About the role

Cisco's Silicon One team builds hardware platforms central to the AI era, powering its Switching, Routing and Wireless products. This ASIC Engineer position is hybrid, with four days per week at the Yerevan office. You will develop and run testbenches to verify DFT architectures and work closely with ASIC design and verification teams.

Key responsibilities

• Develop and execute comprehensive testbenches to verify DFT architectures, covering complex silicon design specifications.
• Collaborate with ASIC design and verification teams to integrate, simulate and debug test logic throughout the implementation flow.
• Implement DFT methodologies across emerging silicon models, including scan chains, MBIST and in-system test structures.
• Analyze and resolve verification bottlenecks with industry-standard debug tools to deliver clean test patterns and meet tapeout milestones.

Required profile

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering or a related technical field.
• 5+ years of professional experience in design verification, DFT verification or ASIC design.
• Proven experience in test planning, testbench execution and coverage closure.
• Preferred: hands-on testbench development with SystemVerilog and UVM, knowledge of IEEE 1149.1 JTAG, scan compression, MBIST and boundary scan, and exposure to FinFET nodes and post-silicon validation or ATE bring-up.

Required skills

• Waveform debugging and simulation with Verdi or DVE.
• Scripting in Python, Tcl or Perl for verification automation and test flow execution.
• Strong cross-functional communication and ability to work independently and solve problems proactively.