Standard Cell Library Engineering Internship

About the role

Synopsys, a semiconductor design software company, offers an internship within its Standard Cell Logic Libraries Build, Validation & Release team. The team develops, validates and delivers high-quality standard cell libraries used in semiconductor design flows, working alongside library development, characterization, CAD and design teams.

Key responsibilities

• Support standard cell library build and integration flows.
• Integrate library views and deliverables across process corners and configurations.
• Maintain and improve build scripts and automation infrastructure.
• Support library configuration management and release preparation.
• Run functional, structural and consistency checks on library deliverables.
• Execute validation flows and analyze validation failures to support issue resolution.
• Ensure consistency across library views, formats and release configurations.

Required profile

• Currently pursuing a degree in Electrical, Electronics, Computer Engineering or a related field.
• Basic understanding of CMOS technology and standard cell libraries.
• Familiarity with EDA views and formats such as Liberty, LEF, GDSII, Verilog and CDL/SPICE.
• Basic knowledge of physical verification concepts (DRC, LVS, ERC, EM).
• Strong analytical, debugging and problem-solving skills, and good written and verbal English.
• AI tool familiarity is a plus.

Required skills

• Scripting in Python, Shell/Bash or Tcl.
• Familiarity with Linux/Unix environments.
• Familiarity with EDA tools for library development or physical verification.