Senior ASIC Layout Engineer

About the role

Cisco is hiring a Senior ASIC Layout Engineer to own standard cell layout for its next-generation ASICs on FinFET and GAA nodes. The engineer designs and verifies high-performance cells, drives physical verification to clean signoff and owns library quality from GDS to release, working closely with circuit design, characterization, physical design and foundry teams.

Key responsibilities

• Drive the layout architecture and design of standard cell libraries: logic, high-drive, clock, level shifter, tap/boundary and specialty cells.
• Own the physical design of complex cells, optimizing for density, performance, power, EM and manufacturability.
• Drive physical verification to clean signoff: DRC, LVS, antenna, ERC, extraction and EM/IR.
• Define and own library QA, keeping GDS, LEF, Liberty, NDM, CDL and Verilog consistent and ready for signoff.
• Develop and deploy automation for layout, verification and QA (Python, Tcl, SKILL).
• Contribute to analog/mixed-signal IP design and layout, and work with the characterization team on extraction, netlist QA and correlation.
• Lead block-level issue resolution, take part in chip-level debug, run layout and QA reviews and mentor engineers.

Required profile

• Bachelor's degree plus 7 years, Master's degree plus 4 years, or PhD plus 1 year of related experience in Electrical Engineering, Computer Engineering or a related field.
• First-hand standard cell layout experience on advanced nodes such as TSMC 5nm, 3nm or 2nm.
• Strong physical verification and extraction experience, and experience with library QA and view consistency checks.
• Preferred: analog/mixed-signal design and layout, standard cell characterization and Liberty modeling, library release, EM/IR closure and low-power cells, IO/bump cell layout, and strong written and spoken English.

Required skills

• Proficiency in Cadence Virtuoso
• Physical verification and extraction tools such as Calibre, ICV, StarRC or Quantus
• Library QA (GDS, LEF, Liberty, CDL)
• Automation scripting in Python, Tcl, SKILL or Perl (preferred)