ASIC Physical Design Intern
Synopsys Inc · Erevan
Job description
About the role
Join Synopsys as an ASIC Physical Design Intern and work on real-world backend ASIC design projects, from netlist to GDSII, while collaborating with a dynamic, inclusive team.
Key responsibilities
- Execute the backend ASIC design flow, including physical verification of standard cell libraries.
- Analyze and debug verification results and support cross‑functional design activities.
Required profile
- Currently in the 3rd or final year of Electronics Engineering, Telecommunications, Automation & Control, Computer Science, or a related field.
- Strong English communication skills, self‑learning ability, and a motivated work ethic.
Required skills
- Good knowledge of UNIX/Linux operating systems.
- Basic Shell and TCL scripting for automation.
- Familiarity with VLSI technology, standard cell libraries, and PDKs (a plus).
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Published 14 ժամ առաջ
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Synopsys Inc
Erevan