ASIC Engineering Lead

About the role

Join Cisco’s CHG Team in Armenia to lead the physical implementation of high‑complexity silicon blocks for the Silicon One brand. You will drive designs from RTL through tape‑out, ensuring production‑ready delivery for cutting‑edge networking chips.

Key responsibilities

• Lead end‑to‑end physical implementation of silicon blocks, covering synthesis, place‑and‑route, and timing closure.
• Collaborate with global frontend, IP, and CAD teams to resolve implementation challenges and integrate systems.
• Advance physical design methodologies by conducting technical investigations and proposing flow improvements.
• Provide technical direction and mentorship to peers, fostering an innovative engineering environment.

Required profile

• Bachelor's or Master's degree in Electrical Engineering, Computer Science, or related field.
• Minimum 8 years of ASIC design, physical implementation, and verification experience.
• Proven expertise in deep submicron CMOS technologies and full design cycle from RTL to GDSII.
• Excellent verbal and written communication skills in English.

Required skills

• Synthesis, place‑and‑route, and timing closure.
• Block‑level design flow, EM/IR and ESD analysis.
• Scripting in Tcl, Python, or Shell.
• Mentoring and collaboration with global teams and external vendors.